The present invention relates to integrated circuit memory, and particularly to low-power integrated circuit memory which is designed to operate at very low voltages.
The present invention will be discussed in the context of a low-power electronic data module, which provides read/write access to an integrated circuit memory using a one-wire bus. However, it should be appreciated that a wide variety of other integrated circuit and system implementations can advantageously incorporate the claimed innovative teachings.
Among the innovative teachings set forth in the present application is a low-power low-voltage CMOS six-transistor static random access memory (SRAM), which can operate on a power supply voltage which is less than the sum of the NMOS and PMOS threshold voltages, and which does not include any analog or metastable sense amplifier stages. The selected cell is allowed to pull one of its bitline pair all the way down to ground. Thus, full logic levels appear on the bitline pair. Only one line of the bitline pair is connected to the following gate stage. Preferably bitline precharge transistors are connected to pull up all bitline pairs whenever the RAM is not selected.